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Method of Permuting Pixels in a Parallel Image Processor

IP.com Disclosure Number: IPCOM000042055D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03

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Related People

Jackson, PH Miessler, MH [+details]


This article concerns an image processor in which image points (pixels) are stored in a word-organized random-access memory (RAM) in the manner described, for example, in U.S. Patent 3,938,102. In such a processor having a parallel processing unit for the whole or for a part of a kernel (i.e., cluster of pixels), a typical operation is that of a "mask of multiplicands" being applied to the kernel followed by summation of the products: kernel mask p11 p12 p13 m11 m12 m13 p21 p22 p23 m21 m22 m23 p31 p32 p33 m31 m32 m33 Z = S pij.mij.i,j Because the individual pixels of the kernel appear on the output of the memory in an order which is different for different addresses of the kernel, it is necessary to "permute" the members so that they match their corresponding multipliers mij.