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TTL Input Buffer With Variable Input Levels

IP.com Disclosure Number: IPCOM000042060D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03

Publishing Venue

IBM

Related People

Authors:
Doerre, GW Gray, KS Kilmer, CA [+details]

Abstract

A new TTL (transistor-transistor logic) input buffer is shown which is capable of providing FET RAM chips with a variable reference voltage. A plurality of fuses are selectively opened to set the reference voltage through selected voltage dividers. The invention presents an improvement over conventional chip drive circuits which provide an invariable reference level. Fig. 1 shows a conventional TTL input buffer circuit used by the command inputs of FET RAM chips. The parallel-connected resistors R1 and R2 (R1 // R2) in hatched box 10 form a voltage divider which produces an invariable reference voltage Va (at Node A).