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Stress Relief Printed Circuit Wiring

IP.com Disclosure Number: IPCOM000042140D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-03

Publishing Venue

IBM

Related People

Authors:
Girvan, EJ Roberts, GC [+details]

Abstract

There is here shown and described a technique for providing stress relief in printed wiring patterns on printed circuit cards for compensating for variances in thermal expansion and contraction between components and the card. In the past stress has been concentrated in the solder connection. On compliant surface cards stress has been transferred to the printed circuit wiring. Adding a jog in the wiring pattern coming from the surface-soldered component relieves stress on the wiring. In the figure, surface solder pad 2 is connected by conventional wiring pattern 4, illustrated in solid lines, to the periphery of via 6. Tensile or compressive stress resulting from a mismatch in thermal properties is concentrated in the wiring pattern 4. The jogged connections shown in phantom provide stress relief at their bend points.