Browse Prior Art Database

Package Test Chip

IP.com Disclosure Number: IPCOM000042405D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-03

Publishing Venue

IBM

Related People

Authors:
Anderson, CJ [+details]

Abstract

Multiple resistive splits on a package test chip provide for testing several different low temperature chips having the same package footprint. The test chip shown in Fig. 1 has four inputs to resistive splits. Low temperature testing may take place at liquid helium (4.2K) temperature. The outputs of the resistor splits go to all the rest of the chip signal pads. The resistor RS used in the resistor split should be about 200 L, which is much larger than the series resistance in the input/output (I/O) cable from room temperature. The inputs to the resistor splits should be symmetric about the chip, but the wiring of the outputs of the resistor split to the pads should not be symmetric about the chip, because then the chip can be rotated and have a different wiring configuration. Fig.