Browse Prior Art Database

Universal Counter Function Utilizing a Shift Register Latch String

IP.com Disclosure Number: IPCOM000042679D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04

Publishing Venue

IBM

Related People

Authors:
Hack, GE [+details]

Abstract

A series of shift register latches (SRLs) can be configured as a universal counter. For each shift of the SRL clocks, the selected outputs will be incremented. The illustrated 15-position shift register (Fig. 1), after being initialized with an appropriate bit configuration (Fig. 2), will then count in multiples from 0 to 15 depending on the initializing bit configuration. The out-of-phase output is used for the feed forward for odd multiples and the in-phase output is used for even multiples. The ROM (read-only memory) circuitry is a convenient means of initializing the SRL and controlling the odd/even count circuitry. The technique can be used in similar fashion to build counters of larger capacity.