Browse Prior Art Database

Block Graphics Generator

IP.com Disclosure Number: IPCOM000042764D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04

Publishing Venue

IBM

Related People

Authors:
Eggebrecht, LC Saenz, JA [+details]

Abstract

In certain computer systems, it is desirable to have the option of providing block graphic characters by using either a hardware generator or character codes included in the conventional character generator read-only storage (ROS). For instance, the Intel 8275 CRT controller includes two outputs called LA0 and LA1 which with other logic generate the block graphic character signals. However, when connected in a conventional manner, the hardware-generated block graphic characters do not permit continuous horizontal lines, since only 8 dots are provided in a 9 dot space. Referring to the figure, the system data bus is connected to the CRT controller 10 and causes address signals to be provided from the address bus to a character generator 12.