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# Diode Current Switch Logic

IP.com Disclosure Number: IPCOM000042910D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 62K

IBM

## Related People

Boudon, G: AUTHOR [+2]

## Abstract

This article relates to a logic family, called Diode Current Switch Logic (DCSL), which allows the chip density, the performance and the merit factor (power x speed) of the logic functions to be significantly improved. The basic circuitry is shown in Fig. 1. Diodes D1 to D4 at the inputs performing AND functions (positive logic) are connected to the bases of transistors T1, T2 performing an OR function. These transistors are arranged with transistor T3 as a current switch circuit whose outputs provide the true and complement values of the logic function. A dot AND function can be made on these outputs. All the logic functions necessary for the logic part of a chip can be obtained from the circuitry shown in Fig. 1.

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Diode Current Switch Logic

This article relates to a logic family, called Diode Current Switch Logic (DCSL), which allows the chip density, the performance and the merit factor (power x speed) of the logic functions to be significantly improved. The basic circuitry is shown in Fig. 1. Diodes D1 to D4 at the inputs performing AND functions (positive logic) are connected to the bases of transistors T1, T2 performing an OR function. These transistors are arranged with transistor T3 as a current switch circuit whose outputs provide the true and complement values of the logic function. A dot AND function can be made on these outputs. All the logic functions necessary for the logic part of a chip can be obtained from the circuitry shown in Fig. 1. As such, it may be used as a multiplexer, or if the in-phase output of a circuit is connected to one of its input diodes, a latch is made. Fig. 2 shows an exclusive-OR circuit. Transistor T4 is optional, and the collector of T5 can be connected to the power supply voltage. Connecting the output AB at the collector of T5 to obtain an OR function improves the noise immunity of the circuitry when A and B are both set to 1. As for a given difference between the UP levels A and B, T6 or T7 may be turned ON causing a degradation of the UP level of the signal applied on the base of T8; a risk exists of losing the data. But in these conditions, the base of T4 is at an UP level, keeping the output of the circuit at a correct level. Th...