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Use of Masking Register for VLT Animation Speedup

IP.com Disclosure Number: IPCOM000042977D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04

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Related People

Bantz, DF Lumelsky, L [+details]


The present disclosure concerns a mask register, whose contents are bitwise ANDed with pixel data from a frame buffer before that data is applied to a VLT (Video Look-up Table) as an address. This facility increases the speed with which the display can be switched from one prestored picture to another, at minimal cost. It is especially suitable to frame-buffered systems with large numbers of bits per pixel. In frame-buffered raster computer display systems it is often the case that pixel values read from the frame buffer undergo translation before video is generated. The pixel values are used as the addresses to a read/write memory (called the Video Lookup Table or VLT) and the values read from this table are used as input to digital-to-analog converters for the purposes of video generation.