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Browse Prior Art Database

Defective Pin Detection System

IP.com Disclosure Number: IPCOM000043143D
Original Publication Date: 1984-Jul-01
Included in the Prior Art Database: 2005-Feb-04

Publishing Venue

IBM

Related People

Authors:
Abraitis, AM Kish, S Rogers, CT Scott, RM [+details]

Abstract

It is well known that a multilayer ceramic integrated circuit packaging substrate may include on the order of 1800 input/output pins brazed to the bottom surface thereof. A single defective pin (e.g., bent, crimped or misshaped) can require expensive rework or scrapping of a multilayer ceramic substrate. Disclosed herein is a system for inspecting pins prior to brazing in order to detect defective pins. The system employs a pin nest having an array of holes for inserting pins therein. An illuminator provides low angle collimated light on the nest surface, resulting in a dark field effect. Good pins seat properly in the nest and are not illuminated. Defective pins do not seat properly and are illuminated. Referring to the figure, high intensity neon lamps 1 are mounted on each side of a frame 2.