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TTL Decoder for Bipolar Arrays

IP.com Disclosure Number: IPCOM000043151D
Original Publication Date: 1984-Jul-01
Included in the Prior Art Database: 2005-Feb-04

Publishing Venue

IBM

Related People

Authors:
Chan, YH Leung, KK Struk, JR Sullivan, SC [+details]

Abstract

This article describes a unique circuit technique designed to enhance TTL decoder performance. Fig. 1 shows a typical TTL decoder used in bipolar arrays. It has emitter inputs and an emitter follower output. Schottky diode D1 is an up-level clamp added to shift the output up level a VF down from Vp. Resistors RIN - R1 form a split-resistor voltage divider used to prevent TIN from saturation when the input is low. A constant current source IPD is provided for emitter follower pull-down. This circuit can be used either as a bit decoder or word line decoder/driver. Fig. 2 shows an improved TTL decoder. This circuit has two unique features over the prior design. (1) It uses a resistor network as a variable up-level clamp.