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IBM Personal Computer BUS to the Standard BUS Interface

IP.com Disclosure Number: IPCOM000043168D
Original Publication Date: 1984-Jul-01
Included in the Prior Art Database: 2005-Feb-04

Publishing Venue

IBM

Related People

Authors:
Alewine, NJ Arnold, OE DePaula, J Floyd, RE Lisanke, M Stermer, TW [+details]

Abstract

The IBM Personal Computer (PC) BUS to Standard (STD) BUS interface circuit has been designed to permit any equipment that can be attached to the STD BUS to be attached to the IBM Personal Computer. Only one interface design is required instead of separate interfaces for each piece of equipment. The DATA BUS 1 for the PC and the STD BUS are bidirectional, as shown in Fig. 1. Circuits are inserted into the lines for repowering and to provide the directional gating required. The direction of the data and the line control are controlled by the PC. The MEMR NOT 2 and the IOR NOT 3 signals are ORed together to generate the RD NOT 6 signal for the STD BUS, informing it that a read operation is to take place. The MEMW NOT 4 and the IO NOT 5 signals are ORed together to produce the WR NOT signal 9 for writing to the STD BUS.