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Technique for Selective Removal of Polysilicon Gate Electrode and Subsequent Isolation of Gate Shorts

IP.com Disclosure Number: IPCOM000043178D
Original Publication Date: 1984-Jul-01
Included in the Prior Art Database: 2005-Feb-04

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Related People

Holden, DM Renaud, DP [+details]


In order to successfully failure analyze silicon gate FET devices, it is necessary to remove the polysilicon gate electrode without destroying the associated oxide layers. The following technique uses the isotropic etch characteristics of CF4 in a plasma etcher to selectively remove the polysilicon gate while the remainder of the device is protected from serious damage. 1. A failure has been electrically isolated to a particular polysilicon gate. 2. By use of a microphotoresist technique, all but the contact to the gate is protected with photoresist. 3. Through the hole developed in the photoresist, the aluminum at the gate contact is removed by wet chemical etching. At this point, the new technique is used. 4.