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Browse Prior Art Database

Main Storage Error Mapping Mechanism

IP.com Disclosure Number: IPCOM000043231D
Original Publication Date: 1984-Aug-01
Included in the Prior Art Database: 2005-Feb-04

Publishing Venue

IBM

Related People

Authors:
Flusche, FO Sager, GS [+details]

Abstract

A method is disclosed to provide an aid for faulty element identification when main store failure occurs by recording correctable and uncorrectable error occurrences. In a typical storage system, repair of hardware which is creating intermittent uncorrectable errors (UEs) requires reproduction of at least one of the correctable errors (CEs) by a diagnostic program. Experience has shown that a diagnostic program is not always able to reproduce the failure. Procedures are used which relocate array cards by dispersing them across different error boundaries. This results in multiple errors before a failing array card/component can be found or verified. Another solution has been to replace entire groups of storage cards, which is a very costly form of repair.