Microprocessor-Controlled Programmable Event Timer
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
A technique is described whereby event timing control hardware is incorporated along with a microprocessor to relieve the microprocessor of trivial tasks, such as applications where certain events must be kept active or inactive for multiple clock frequency periods, or in applications where an event is repeated for long periods of time. By incorporating event timing control hardware, the microprocessor is not required to continuously monitor the status of the events. The event timing control hardware utilizes readily available computer components, such as a 74191 counter and a pair of 7485 magnitude comparators. Magnitude comparators 1 and 2 receive information at inputs A from the microprocessor (MPU).