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Hybrid Bipolar/Fet Electrostatic Discharge Protection Circuit

IP.com Disclosure Number: IPCOM000043782D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05

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Bakeman, P Wilcox, R [+details]


Protection from both electrostatic discharge (ESD) and process-induced voltages on thin oxide VLSI chips can be provided by a hybrid circuit consisting of a lateral NPN bipolar device in parallel with a series combination of a 500 L diffused or poly resistor and a string of field-effect transistor (FET) devices in series. In operation, lateral NPN 11 provides protection from ESD events while the series string of FET devices 12 provides a parallel leakage path to the substrate for process-induced charges. The number of devices in FET string 12 can be adjusted to determine the "turn-on" point of the leakage path to the substrate.