Dynamic Address Allocation for a Multiplex Attachment to a Scanning Device
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
This article relates to a device for interfacing a multiplex link and the scanner device of a communication controller when the scanner is so designed that it receives and processes the received data and the data to be transmitted bit by bit. For a receive operation, the byte of one channel on the multiplex link of the X 22 type is deserialized into shift register SR1. This byte is loaded into the random-access memory (RAM). Every RAM address corresponds to one line address. When the scanner device scans a line, the corresponding byte is transferred from the RAM into shift register SR2. Only the first right bit is sent to the scanning device.