Browse Prior Art Database

Intelligent Network Router

IP.com Disclosure Number: IPCOM000043854D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05

Publishing Venue

IBM

Related People

Authors:
Johnson, WJ Millas, RJ Weakley, TL [+details]

Abstract

A technique is described whereby a high speed microprocessor is used to dynamically route communication functions, thus relieving the main central processing unit (CPU) of routine routing tasks. The basic concept used in intelligent network router applications is shown in Fig. 1, where the Intelligent Network Router (INR) is interconnected through the bus control logic unit to the CPU. Dynamic routing within the INR, as shown in Fig. 2, is performed by maintaining continuously updated routing tables 10. The high speed microprocessor 12 updates the routing tables 10 in response to line conditions. The main CPU is also able to alter the routing tables when needed. It should be noted that this technique can only be used with bit-orientated protocols.