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Browse Prior Art Database

Trench Planarization Technique

IP.com Disclosure Number: IPCOM000044097D
Original Publication Date: 1984-Nov-01
Included in the Prior Art Database: 2005-Feb-05

Publishing Venue

IBM

Related People

Authors:
Koburger, CW [+details]

Abstract

Trench planarization techniques currently depend on etch-stops for a process such as chemical-mechanical polishing or careful monitoring of etch depth for reactive ion etch (RIE) planarization. The overall surface following deposition of the planarizing layer is approximately planar, but the relatively thick planarizing layer covering the surface represents an unwanted film and must be removed in a planar manner down to approximately the original silicon surface. A planarization sequence enables formation of perfectly-planarized fill-trench structures. The sequence employs a simple etch process which is compatible with current semiconductor fabrication techniques, and has much-reduced requirements concerning etch and fill uniformities. A non-selective etch is used to etch the trench structures (Fig.