Viewport Priority Circuit
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-05
The present circuit determines priority among a plurality of viewports which are to be simultaneously displayed on the same screen. Each of the viewports is identified by a unique viewport ID consisting of n bits. Thus, up to 2n viewports can be distinguished from each other. When it is desired to simultaneously display a plurality of viewports, n-bit priority registers 10 are loaded with the viewport ID's thereof in accordance with a predetermined priority. A viewport ID loaded into a priority register 0 has the highest priority, while a viewport ID loaded into a priority register 2n - 1 has the lowest priority. The smaller the priority register number, the higher the priority. If a viewport ID of a selected viewport is loaded into all the priority registers, the other viewports would never be displayed.