Method for Prioritizing Waiting Arithmetic Instructions
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-05
A method for increasing the throughput of a highly concurrent arithmetic unit with multiple arithmetic pipelines is described. Throughout the following discussion, an arithmetic unit similar to the IBM System/360 Model 91 floating point arithmetic unit is assumed. In such a unit, arithmetic instructions are decoded and added to a waiting station (reservation station) for eventual processing by the arithmetic pipeline associated with the waiting station. There may be several pipelines and several waiting stations. Even though an instruction gets decoded, it may not get executed immediately. It may, in fact, exit the decode station, enter a waiting station, and wait many cycles. While it is waiting, later instructions may be decoded and entered into the wait station.