Browse Prior Art Database

Operand History Table

IP.com Disclosure Number: IPCOM000044351D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-05

Publishing Venue

IBM

Related People

Authors:
Emma, PG Pomerene, JH Puzak, TR Rechtschaffen, RN Sparacio, FJ [+details]

Abstract

Operand pre-fetching for faster instruction executions is described. Trace analysis has shown that many of the instructions that require an operand compute the same operand address each time that the instruction is executed. Consider the instruction format below: (Image Omitted) The operand address is computed by adding the contents of the base register to the contents of the index register to the value of the displacement field supplied by the instruction. That is, operand address = C(B) + C(X) + displacement. This calculation is normally performed at address generation (AGEN) time. The operands are then fetched from the cache or memory. The time needed to fetch the operands depends on the speed of the cache or memory. Fig. 1 represents an idealized, cycle by cycle description of an instruction passing through a pipeline.