Browse Prior Art Database

Symmetrical Processor

IP.com Disclosure Number: IPCOM000044372D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-05

Publishing Venue

IBM

Related People

Authors:
Dutton, PF Sitler, WR [+details]

Abstract

A symmetrical processor (S/P) is implemented by designing a first processor with the proper control logic adding a second, identical processor and then integrating both of them together with two main memory units (basic storage module) (BSM)). Starting with a base system (Fig. 1) containing the 00 processor and a selection of BSM 00 sizes, a second processor, processor 01, is then added, significantly increasing performance, flexibility and availability. Processor 00 with BSM 00 is a standard uniprocessor (U/P). Adding processor 01 turns the system into an attached processor (A/P). If an A/P is designed to be symmetrical and a second BSM, BSM 01, is added, a symmetrical processor is created. A S/P can improve availability, increase performance and increase flexibility beyond that of an A/P.