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Self-Aligning Metal Land and Feed-Through Structure

IP.com Disclosure Number: IPCOM000044505D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06

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Havas, J Lechaton, JS Malaviya, SD Srinivasan, GR [+details]


The number of usable circuits on semiconductor chips is generally limited by the spacing of the wiring channels. One such limiting factor is the alignment of the via hole or via stud to the metal land. This article describes a method for simultaneously forming a metal land/via stud structure which is self-aligning. Step 1: Blanket deposit CrAlCu, or any desired metal, over the entire wafer, after PtSi contacts are formed as usual, to a thickness equal to the total desired thickness of the metal lines and the stud, e.g., 2.5 microns. Step 2: Deposit a suitable masking layer, e.g., Si3N4 (or MgO, etc.) over the metal to the desired thickness, e.g., 0.75 - 1.0 micron. Step 3: Apply photoresist (P/R), expose and develop the desired metal pattern and use it as a mask to reactive ion etch (RIE) the exposed layer of Si3N4, e.g.