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Process for Fabricating an LDDFET

IP.com Disclosure Number: IPCOM000044507D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06

Publishing Venue

IBM

Related People

Authors:
Jambotkar, CG [+details]

Abstract

This article describes a simplified method of constructing a lightly doped drain/source field-effect transistor (LDDFET). The method is as follows: - Beginning with P substrate 2 (Fig. 1), form field oxide 4, typically 1 mm thick. If necessary, a channel stopper P region may be formed beneath the field oxide. Form about a 300 A gate oxide 6, then deposit N+ doped polysilicon 8 of about 5000 A thickness. Form a layer of photoresist 10 above poly 8. Then, preferably using the technique of "image transfer" or "multilayer resist," form patterns in resist 10. Employing reactive ion etching (RIE), etch poly 8 with resist 10 as the mask. The structure at this stage is illustrated in Fig. 1 Resist 10 remains in place (at least about 4000 A after RIE), and is not stripped at this stage.