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Differential Cascode Current Switch Full Adder Look-Ahead Circuitry

IP.com Disclosure Number: IPCOM000044508D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06

Publishing Venue

IBM

Related People

Authors:
Leininger, JC [+details]

Abstract

This article describes a circuit arrangement which provides carry and propagate look-ahead circuitry so that sums may be obtained with minimum delay. Differential Cascode Current Switch (DCCS) and Cascode Voltage Switch (CVS) circuitry is often generated by software programs. The function that is desired is described in a high-level language and then decomposition programs are run to generate the individual circuits (trees). While these decomposition programs tend to give satisfactory results for random logic with few variables, large functions, such as full adders with many input variables, are not handled efficiently. The programs give results that have many more DCCS circuits than necessary and more stages of delay than desirable. Figs.