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Circuit for Mapping Small Blocks of Large Memory Address Spaces

IP.com Disclosure Number: IPCOM000044514D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06

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Related People

Lloyd, RP Ovies, H [+details]


This article describes a test circuit that allows the recording of testcase coverage of a small memory address block (64K) that is part of a large memory address space, typically 32 bits (4096K). Mapping of instruction execution is a technique used in the testing of computer system software and microcode. Mapping is a process by which memory addresses executed are flagged and displayed in an X-Y plane which contains all the possible memory addresses. Systems with small address spaces (16- to 20-bit address lines) can be mapped straight forward with a hardware mapper which has a memory capacity of 64K by 1 bit to 1024K by 1 bit. Newer computer systems, though, have address line capacity of 32 bits which means a mapper is required with a 4,298,080K by 1 bit capacity.