Browse Prior Art Database

Switchable Up-Level Clamp Circuit Disclosure Number: IPCOM000044629D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06

Publishing Venue


Related People

Chan, YH [+details]


Background In high density, high performance arrays using CTS cells [*], the voltage mode word selection scheme is preferred over the conventional constant current source technique. The key advantages of voltage mode operation are faster performance and better stability. The proper operation of a voltage mode word selection design requires a bit-up-level clamp reference which has to track with the selected word line cells. The bit-level clamp reference serves two functions: (1) set an operating point for the selected cell during read (i.e., to guarantee IL and IG currents into a READ cell under all environments) and (2) control and perform the write function. Disclosed here is a switchable bit-up-level clamp circuit designed for CTS arrays operating in voltage mode.