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High Speed Bipolar Process

IP.com Disclosure Number: IPCOM000044663D
Original Publication Date: 1984-Dec-01
Included in the Prior Art Database: 2005-Feb-06

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Malaviya, SD [+details]


This article outlines a relatively simple set of process steps for the fabrication of high performance bipolar transistors. By use of the disclosed process, improvements in device density, speed and planarity may be realized together with cost savings attendant to process simplification. While the self-aligned metallurgy process (SAM) (U.S. Patent 4,400,865) employs photoresist (P/R) to define a pattern (in polysilicon) which eventually supports oxide studs isolating the devices's emitter and base contacts, the disclosed process eliminates the use of polysilicon altogether, through employment of the photoresist pattern itself as the initial support for the studs.