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This integrated circuit utilizes the parasitic capacitance of the emitter resistor Re to detect the edges of input pulses.
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Edge Detecting Logic Circuit
This integrated circuit utilizes the parasitic capacitance of the emitter resistor
Re to detect the edges of input pulses.
When the input is low, T1 is not fully conducting so that the emitter voltage is
low. When the input voltage increases rapidly (like the rising edge of an input
pulse) the emitter voltage can not change quickly due to the presence of Cre.
Therefore, T1 conducts and the output voltage drops. Simultaneously, Cre is
charged by the emitter current. As the voltage falls, the output follows the input
due to the base-collector capacitance of the transistor. After a very short time
(<5ns), normal transistor action gains control and the output voltage rises.
Diode Dc is an integrated high Schottky barrier diode anti- saturation clamp.
Resistors Rb, Rc and Re bias the transistor.