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Priority System with Combination of Alternating Priority Sequence and Priority Based on Request Queue Length Disclosure Number: IPCOM000044849D
Original Publication Date: 1984-Nov-01
Included in the Prior Art Database: 2005-Feb-06

Publishing Venue


Related People

Capowski, RS Herr, WF Keslin, R Zimmerman, TK [+details]


A known circuit establishes a different priority among system components for each request time and it changes the priority from cycle to cycle in a predetermined sequence that repeats after a number of access cycles. For example, components A and B might alternate as top priority contenders on certain request cycles in the sequence. This circuit is combined with a circuit that allocates priority on the basis of the relative demand for the components. Each component maintains a conventional queue of requests. When a request for a system resource is granted to a component, it performs a processing operation for the request at the head of the queue. Each component increments a counter when a request is added to its queue and decrements the counter when a request is removed from its queue.