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Compensation Method for Fabricating Dual Polarity Polycrystalline Silicon Gates for CMOS Integrated Circuits Disclosure Number: IPCOM000044955D
Original Publication Date: 1983-Jan-01
Included in the Prior Art Database: 2005-Feb-06

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Related People

Bassous, E Hu, GJ Osburn, CM [+details]


This publication relates to an improved fabrication process wherein P and N/+/ polycrystalline silicon (poly-Si) gates are fabricated on the same structure using the same number of masks as single-polarity poly-Si devices.