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Diagnostic Algorithm for Logic Test Failures Disclosure Number: IPCOM000045045D
Original Publication Date: 1983-Jan-01
Included in the Prior Art Database: 2005-Feb-06

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Beaudoin, R Hsu, FC [+details]


A new diagnostic algorithm is described. The algorithm uses fault data generated from fault simulation to produce diagnostics for logic test failures. The algorithm keeps track of the faults and outputs which may be affected by the faults and, based on the actual failures observed on the tester, determines the faults which can best explain the failures. Therefore, the algorithm is more accurate than certain of the methods currently in use. Furthermore, in the new algorithm, calculation is one on the tester based on actual failures observed and fault-weighting actors are taken into consideration. Thus, this algorithm has better flexibility to adapt to the mixed-technology card/board manufacturing environment.