Redundancy with Switching Transistors
Original Publication Date: 1983-Jan-01
Included in the Prior Art Database: 2005-Feb-06
The redundancy technique is based upon the availability of a transistor which can be electrically pulsed during the wafer test to create a permanent short between the emitter and the collector, e.g. by outdiffusion of a specially implanted layer of phosphorus near the base. The base to collector and base to emitter junction remains unimpaired by the pulsing.