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N Type Monitor Wafer for Boron Implant Resistor Process Control

IP.com Disclosure Number: IPCOM000045213D
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06

Publishing Venue

IBM

Related People

Authors:
Cavanagh, RA Forneris, JL Hrebin, G Knapp, RA [+details]

Abstract

For implant resistor process control, it is desirable to isolate any sheet resistance variations due to the implant and anneal process from superfluous variations that are due to any deviations in the concentration of the epitaxy or thickness of the dielectric through which the implant is performed. The monitor wafer presently in use achieves this goal; the process is controlled by the use of an implant into an N type bulk substrate through a well-controlled silicon dioxide layer 225 +/- 25 Angstroms thick. The resulting sheet resistance measurements are indicative of variations due only to the implant and anneal processes.