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The three-state driver circuit, shown in the drawing, has particular utility in interfacing logic circuits of a first logic technology family with logic circuits of a second logic technology family.
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Three State Driver Circuit
The three-state driver circuit, shown in the drawing, has particular utility in
interfacing logic circuits of a first logic technology family with logic circuits of a
second logic technology family.
The Down level output voltage is achieved in the same manner as in other
push-pull drivers; that is, when an Up level (logical "1") input data signal is
received at node A, transistors T1, T2, and T6 are turned On, while T4 and T5
are turned Off. Output node 10 is then at the proper Down level.
For the Up level, however, the requirement that the Up level
output voltage be approximately +1.8 volts nominal is met by the
inclusion of feature 1, a Schottky barrier diode added to the T4-T5
Darlington pair. When a logical "0" appears at Input node A,
transistors T1, T2 and T6 turn Off, while T4 and T5 turn On. T3,
which is wired as a diode, is forward biased, clamping the output
through T5, S4 and T4 to the 3 V supply. Since the bases of T3
and T4 are connected, the emitter of T4 is at approximately +3 volts.
Subtracting the forward voltage drop of Schottky barrier diode S4
and the base-emitter voltage of transistor T5 gives the desired
output voltage of +1.8 volts at Ouput node 10. Adding S4 adjusts the
output Up level voltage without hindering the operation of the T4-T5
The above discussion assumes that Inhibit node C is either floating or at an
Up level (logical "11". If a Down level Inhibit signal is applied to node C, feature...