Design Inequivalence Determination Using Syndrome Analysis
Original Publication Date: 1983-Feb-01
Included in the Prior Art Database: 2005-Feb-06
In LSI design verification, two implementations (I(0),I()) of the same specification are compared for equivalence by symbolically expanding around inputs using the successive elimination equation f equals xf(x=0)+xf(x=1) If, however, one uses the syndrome equation S(f)=S(x) S(f (x=1))+(1-S(x))S(f(x=0)), then I(0) is not equal to I(1) only if S(f) is not equal to 0. If S(f)=0, then I(0) may or may not be equal to I(1).