Browse Prior Art Database

Self Testing Scheme Using Register Latches

IP.com Disclosure Number: IPCOM000045296D
Original Publication Date: 1983-Mar-01
Included in the Prior Art Database: 2005-Feb-06

Publishing Venue

IBM

Related People

Authors:
Bottorff, PS DasGupta, RG Walther, RG Williams, TW [+details]

Abstract

The shift register latches (SRLs) 10 are connected to function both as a linear feedback shift register (LFSR) to generate pseudo-random patterns to be applied to the chip inputs as well as a signature analyzer for the network outputs. An example of such a dual-function register is shown in Fig. 1.