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This article discloses a circuit which performs both read and write functions when properly multiplexed. This multiplexing requires a read pulse and two write pulses.
English (United States)
This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
100% of the total text.
Page 1 of 2
General Purpose Resistor Read and Write Head
This article discloses a circuit which performs both read and write functions
when properly multiplexed. This multiplexing requires a read pulse and two write
In the write mode, both the left and right hit lines have been restored high
after the previous cycle. The "WRITE" WR1 and WR2 pulses are high and the
"READ" RD pulse is low, turning on devices 11, 15, 18, and 20, shutting off
devices 12 and 21. If the "WRITE Data in" signal is high, the left bit line 25 is
discharged through 11 shutting off device 19. With device 19 off, the right bit line
26 remains high, and this differential signal is written into the specifically decoded
cell (not shown) on this bit line.
In the read mode, devices 11, 15, 18, and 20 are off, and devices 12 and 21
are on. The decoded cell places data on the bit lines, making either the left 25 or
right 26 line high. Either device 13 or 22 turns on, discharging the gate of device
23 or 24, which send read data out. In this mode, the senses of the bit lines
always oppose one another.
By using two write clock pulses WR1 and WR2 a possible race condition,
during the write mode, is avoided.
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