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Extending an Instruction Set to Allow Additional Index Registers

IP.com Disclosure Number: IPCOM000045678D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Whitely, LD [+details]

Abstract

A mechanism is provided which allows the use of previously defined work registers as address register consistent with an existent instruction set such as one used in the IBM System/3 and System/34 computer systems. The expanded register set is shown in Fig. 1. The Q-codes to support operations on these registers are likewise expanded, one Q-code indicating a two-byte operation and the other indicating a three-byte operation. Any register used to address an operand has its address specified in two of the first four bits in the op code. Once the code points are used up, there is no provision for expansion of index registers.