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Browse Prior Art Database

Early Forced Castout Scheme for MP System

IP.com Disclosure Number: IPCOM000045732D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Tan, KG [+details]

Abstract

In a store in cache (SIC) algorithm for cache management, the 'changed data' stays in the cache until either one of the following two conditions occurs: a. The data is cast out (store to main memory) due to the normal cache line LRU (least recently used) replacement. b. The data is requested by other processors; hence. a forced 'castout' takes place. The data-sharing phenomenon, as indicated in case (b) above, causes significant performance degradation in the multiprocessor (MP) environment and has motivated several new design proposals, such as a shared cache and a cache to cache transfer scheme. One of the key components in the shared data relates to invoking the 'system lock' before accessing the shared data (such as control blocks).