Browse Prior Art Database

High Low RIE Process

IP.com Disclosure Number: IPCOM000045813D
Original Publication Date: 1983-Apr-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Lechaton, JS Srinivasan, GR [+details]

Abstract

Use of high reactive ion etch (RIE) rates is desirable for deep etching, such as opening a deep isolation trench in silicon wafers to reduce the etch time. These high etch rates require higher power to the substrate electrode. However, high energy ion bombardment results in crystalline damage to the silicon wafer which is typically 10 to 20 nanometers deep. Thermal oxidation of this damaged silicon can result in stacking faults, which could, for example, traverse large distances and cause device degradation.