Product Self-Test Signature Testing
Original Publication Date: 1983-May-01
Included in the Prior Art Database: 2005-Feb-07
It is possible to implement a self-test function by monitoring appropriate bus lines from a logic circuit module or larger assembly and create a test signature therefrom. This test signature is based on a parity bit generated for each of the test output states on the bus lines being monitored. The parity bit based signature is then stored in RAM (random-access memory) during each operative cycle. This process can be repeated in parallel n times.