Tip-Point Decoder Gate With Improved Margins
Original Publication Date: 1983-Jun-01
Included in the Prior Art Database: 2005-Feb-07
In self-resetting decoder gates employed in Josephson memory designs undesirable multiple switching occurs because the gate resets after the fast transfer of its gate current into the output loop into the zero- voltage state while the input control current is still present. It is proposed to employ an asymmetric 2-junction tip-point interferometer which is damped such that the resulting change in the switching characteristic eliminates the occurrence of multiple switching.