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Josephson Feedback Decoder Gate

IP.com Disclosure Number: IPCOM000046103D
Original Publication Date: 1983-Jun-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Jackel, H [+details]

Abstract

In self-resetting decoder gates employed in Josephson memory designs undesirable multiple switching occurs because the gate resets after the fast transfer of its gate current into the output loop into the zero- voltage state while the input control current is still present. A negative feedback scheme is proposed that eliminates the occurrence of multiple switching.