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Simplified Trench Planarization Process Disclosure Number: IPCOM000046112D
Original Publication Date: 1983-Jun-01
Included in the Prior Art Database: 2005-Feb-07

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Ho, CW Sun, CP [+details]


This simplified trench planarization process (STPP) is a process for VLSI chip packaging. It provides a simple and clean process for fabrication of planar structures for thin film packaging. The STPP is described as follows: