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Two-Sort Stationary Gravity Feed Output Technique for Lsi Memory Chip Test

IP.com Disclosure Number: IPCOM000046249D
Original Publication Date: 1983-Jun-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Frank, V Nihal, P Puri, P Savkar, A Stencel, J [+details]

Abstract

The existing technique for sorting tested memory chips employs a conveyer belt onto which the tested chips are sequentially placed, for transfer to one of several removal stations where the chips are selectively removed, based upon whether they are all-good, half good, quarter good, etc. Since the memory chips produced for many products have a sufficiently high yield of all-good chips, a simpler technique is disclosed in this article for sorting these chips. A simple gravity feed technique is employed to separate all-good chips from those chips which are tested not to be all-good. The all good receptacle and the not all-good receptacle are each respectively located beneath the vacuum pencil turret where the actual testing is performed.