Browse Prior Art Database

Fault-Tolerant Memory Chip Architecture for Yield Enhancement and Field Repair

IP.com Disclosure Number: IPCOM000046264D
Original Publication Date: 1983-Jun-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Singh, S Singh, VP [+details]

Abstract

This chip has one bit line and/or one word line inplace-spare along with appropriate logic to allow substitution for faults at manufacture for yield enhancement or any other time for field repairs.