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Narrow Base-Width Lateral PNP Fabrication

IP.com Disclosure Number: IPCOM000046616D
Original Publication Date: 1983-Aug-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Bhatia, HS Montillo, FJ Nagarajan, A Venkataraman, K [+details]

Abstract

A lateral PNP device fabrication method is described. The resultant device has an extremely narrow base width for the lateral PNP device compared to currently known lateral PNP base widths and is between about 5 to 8 micrometers. Fig. 1 shows the starting structure with the P substrate 10, an Nsubcollector region 12, an N-epitaxial layer 14, recessed oxide isolation (ROI), and a silicon dioxide surface layer 16. A chemical vapor deposited (CVD) layer 18 of between about 150-160 nanometers of Si3N4 is formed over layer 16. An appropriate resist mask 20 with openings therein for planned P areas is formed by standard lithographic and etching techniques and is shown in Fig. 2. The mask is used to reactive ion etch (RIE) layers 18 and 16. Etching is continued into the monocrystalline silicon to form wells 22.