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Power Failure Detector Circuit

IP.com Disclosure Number: IPCOM000046647D
Original Publication Date: 1983-Aug-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Orengo, G Verhaeghe, M [+details]

Abstract

The circuit of the present disclosure is supplied by power supplies, e.g., + 8.5 V and - 8.5 V, to be checked, and therefore avoids the use of auxiliary supplies or batteries. If one (or both) power supplies fail, the failure is detected by this circuit which, in turn, energizes an alarm-emitting circuit in order to warn, for example, a user. The basic principle of operation of such circuits may be understood from Fig. 1. When the power supplies (+ VF = + 8.5 V and - VF = -8.5 V, operate normally, switches SW1 and SW2 are controlled by the circuit 10 through additional logic circuitry (not shown). Capacitor C between the two power supplies is then charged. As soon as a failure is detected, the switches are opened by inputting an appropriate logic level at output 1.