Browse Prior Art Database

AC Write Operation in a Fast Buffer

IP.com Disclosure Number: IPCOM000046848D
Original Publication Date: 1983-Aug-01
Included in the Prior Art Database: 2005-Feb-07

Publishing Venue

IBM

Related People

Authors:
Arzubi, L Baier, E Loehlein, W [+details]

Abstract

A fast field-effect transistor buffer, the read/write head of which is shown in the circuit diagram, is connected by a bit switch to a single-end sense system in response to the signal BDDR. The read/write head of the buffer is connected through a line to a fan-out node FOL which is linked with a plurality of sense latches. In such a circuit array, writing of a high level signal at the data input was effected by discharging the fan-out node FOL via a DC path. This necessitated very accurate timing to prevent the sense latches from interfering with each other.